Light emitting diodes are based on a forward biased p-n junction. LEDs have recently reached high brightness levels that have allowed them to be used in new solid-state lighting applications, as well as replacements for high brightness light sources, such as light engines for projectors and automotive car headlights. These markets have also been enabled by the economical gains achieved through the high efficiencies of LEDs, as well as reliability, long lifetime and environmental benefits. These gains have been partly achieved by use of LEDs that are capable of being driven at high currents and hence produce high luminous outputs while still maintaining high wall plug efficiencies.
The efficiency of the LED is critical to ensure that solid state lighting is adopted for general lighting applications and be able to fulfill the environmentally friendly lighting solution for future generations. LED lighting has the potential to be up to 20 times more efficient than the incandescent light bulb and last 50-100 times longer (lasting up to 100,000 hrs), resulting in less physical waste, large energy savings and lower cost of ownership. Solid-state lighting applications require that LEDs exceed efficiencies presently achievable by alternative fluorescent lighting technologies.
Current state-of-the-art LED chip performance is at the level of approximately 150 lumen per Watt (Im/W) of electrical drive for a 0.1 W chip. These lateral type LED devices typically reside on an electrically insulating sapphire substrate. Both n- and p-contacts are accessed from the top surface of the chip. The thermal resistance of Sapphire is high and, as a result, it is not possible to drive this chip harder without significantly degrading the LPW. Presently, state-of-the-art vertical current drive LED chips are approximately around the 115 Im/W for a 1 W chip. The theoretical maximum for a blue LED chip with a yellow Phosphor is approximately between 260 LPW and 330 LPW, depending on the colour temperature of the white light generated. The current LPW efficacy at 1 W drive amounts to a wall plug efficiency of 38%. Thus, more than 60% of the electrical drive current is converted to heat. Typically, so-called power chips are about 1 mm2 and are driven in the range 1.0 to 3.0 W. This amounts to a thermal load density of from 0.6 to higher than 1.8 W/mm2. This is a high figure compared to any other semiconductor device and leads to the need to provide specific high performance packaging solutions. To date most packaging has been adapted from the IC industry, where thermal densities are orders of magnitude lower at 1-3 W/cm2.
It is also of particular interest to maintain the small format light emitting device at a low temperature during operation, as the junction temperate of the LED dramatically affects both its life time and its overall efficiency. As a basic rule, every 10° C. increase (above 25° C.) in junction temperature reduces the life time of the LED by 10 kHrs for a Gallium Nitride LED. It is also a consequence of the increase of the junction temperature that the overall efficiency of a state-of-the-art vertical type LED drops. For example, increasing the junction temperature from 40° C. to a 70° C. will reduce the efficacy of the LEDs by more than 10%. It is noted that this effect increasingly becomes nonlinear in behaviour. Thus, appropriate packaging solutions need to be developed to ensure performance is maintained and the operating temperature of the light emitting device is maintained for a given change in the junction temperature as well as the ambient temperature.
The Thermal Resistance of a package is the measure of how well a package can conduct heat away from the junction of the LED. Present state-of-the-art modules have a thermal resistance of between 4 and 8 K/W.
Many methods have been successfully employed to improve the thermal resistance of LED module packages. These include the use of shaped metal lead frames in array formats, as described in U.S. Pat. No. 6,770,498, the use of bulk Aluminum Nitride ceramic tiles with electrical tracking on top, as described in U.S. Patent Application 2006/0091415A1, and the use of flip chip LEDs onto tracked ceramic tiles with through vias to allow surface mounting, as described in published U.S. Patent Application 2006/0091409A1.
Historically, LEDs were of the lateral type grown on either sapphire wafers or silicon carbide wafers, with both contacts located on the top of the LED by means of an etch through the p-n junction to the lower layer. A schematic of this type of LED is shown in FIG. 1. The LED 112 consists of a sapphire substrate 102 upon which has been grown a layer of n-doped semiconductor such as Gallium Nitride. The electrical contact and wire bond pad 109 is in contact with this n-doped semiconductor and forms the n contact to the p-n junction 104. The p-type semiconductor 105 is in contact with the top transparent contact layer 105, which in turn is in contact with 107 the metal wire bond pad. The LED 112 is attached to the metal carrier 100 by a solder of adhesive layer 101. The wire bonds 108 and 110 provide electrical paths from the p-contact (107) and the n-contact (109) to a PCB 111. Thus, the electrical paths are insulated from the metal carrier 100.
The metal carrier can also be an insulating metal core printed circuit board (IMS-PCB) with built-in electrical isolation, removing the need for PCB 111. The lateral chip has a sapphire substrate which provides electrical isolation between the thermal path and the package. This is a desirable feature as it allows simplification of the packaging allowing the chip to be mounted directly on a electrically and thermally conducting material, such as a metal substrate or heat-sink, without it being electrically live. This is particularly important when high DC or AC voltages are present and for safety reasons in the event of driver failure or short circuit. The thermal performance of this kind of LED grown on a sapphire wafer is poor as the thermal conductivity of sapphire is low at 40 W/(m·K) and the wafer is typically thick at 0.4 mm, thus creating a large thermal resistance path as high as 18 K/W. Many manufacturers actually thin the sapphire substrate wafer after processing (by methods such as lapping and polishing) in order to minimise the thermal resistance.
Although the above steps help to improve thermal dissipation, when such LED devices are driven at more than 0.5 W electrical drive power, they show a marked drop in efficiency due to elevated p-n junction temperatures associated with heat build-up in the chip. Another issue related to this kind of chip is the current crowding between and around the contacts 109 and 107 and their associated below optimum current injection into the complete light emitting area 104, all of which leads to further reduced efficiency. In addition, the light extraction can also be affected by such a lateral LED design due to the large percentage overlap between the optically lossy contact areas and the optical modes trapped in the LED semiconductor material, as well as the trapped optical modes residing in the sapphire substrate 102.
In recent years the LEDs themselves have been engineered to produce a low thermal resistance path from the junction to the package where the heat is spread by methods such as the flip-chip approach described above (published U.S. Patent Application 2006/0091409A1), where the junction is very close to the package. Another approach to allow LEDs high current and thermal driving capabilities to work efficiently is the vertical type n-p contact configuration. A vertical type structure is where the n and p contacts are at the top and bottom of the chip. GaN LED vertical LEDs have been disclosed in U.S. Pat. No. 6,884,646 and published U.S. Patent application No. 20060154389A1. Such devices use high thermal conductivity materials, for example Copper, to provide low thermal resistance from the junction to the package.
Vertical type chips have the advantage of excellent thermal performance but at the expense of electrical isolation from the packaging. To achieve this electrical isolation from the packaging, elaborate ceramic submounts and materials are needed. All of these introduce additional parts, assembly complexity, cost and additional thermal interfaces.
We now consider in some detail some existing approaches to packaging using insulated metal core printed circuit boards.
The use of insulated metal substrate printed circuit boards (IMS-PCB) are common place and are as described in U.S. Pat. No. 4,810,563. These are used in many applications including LEDs. They allow the thermal path to be electrically isolated from the electrical contacts of the LED and consist of a metal substrate, commonly Aluminum or copper, and range in thickness between 0.5 mm and 3.2 mm. On top of the substrate is an adhesive layer typically consisting of particulate loaded epoxy. The particulates are chosen to increase the thermal conductivity and include Aluminum Nitride, Diamond and Beryllium Nitride. The next layer is an electrically insulating polyamide film. On top of this is an electrical circuit layer that usually consists of copper. The circuit layer has two functions, one is heat spreading and the other is to provide the electrical circuit layout for the application. On top of this is an insulator to prevent surface short circuits and corrosion.
Typically, to get the required electrical isolation (kilovolts) using a polyamide material, a 75 micron thick sheet is needed. For this, the thermal conductivity is only 2.2 W/(m·K). Such a level is adequate for power electronics where thermal load densities are of the order of Watts/cm2 and is a significant improvement in performance above FR4 circuit boards. However, if this type of IMS-PCB is used with the LED placed directly on the PCB, then high junction temperatures will occur, as the thermal load will not be able to spread adequately in the copper circuit layer.
The IMS-PCB is widely used in the LED packaging industry, as it can be used to mount ceramic packages which perform the function of heat spreading and thereby make the thermal load equivalent to that of power electronics. In addition to this advantage, the IMS-PCB can be machined with holes to allow mechanical attachment to a heat sink.
Of course, all these layers of packaging create extra cost and extra interfaces that increase thermal resistance. The best LEDs packaged in ceramic modules on IMS-PCBs provide a thermal resistance of about 8 K/W from the junction to the base of the module. An LED packaged in this way is shown in FIG. 2. The metal substrate 201 has the adhesive layer 202 attaching a polyamide electrical insulation layer 203. On top of this is the metal circuit tracking layer 204. This assembly, 201, 202, 203 and 204, is the IMS-PCB 221.
On top of this is soldered or bonded using layer 205 the electrically insulating but thermally conducting ceramic tile 214, with the LED 212 attached by a solder or adhesive layer 213. The ceramic tile, 214, can be any number of ceramics such as alumina or aluminium nitride. The top electrical connection from the LED 212 to the electrical circuit layer 208 on the top of the ceramic tile (214) is via a wire bond 211. The electrical circuit layer 208 is in electrical contact with the bottom electrical circuit layer 206 through the use of an electrical via 207. The bottom electrical contact of the LED 212 is in electrical contact with the top electrical contact 215 of the ceramic tile through the use of a solder joint 213. This in turn is in electrical contact with the bottom side 217 of the ceramic tile 214 through the use of an additional electrical via or vias 216.
The use of the thermally conductive ceramic tile 214 ensures that the large bottom contact 220 acts as the thermal path to the IMS PCB 221, but there is no electrical connection as no electrical vias are used in this section of the ceramic tile 214. Thus, the top electrical contact to the LED and the bottom electrical contact to the LED are separated through the use of the IMS PCB 221, and any heat sink attached to the bottom side of the IMS PCB 221 is electrically isolated. This is an important issue when typical metal, graphite or conductive plastic heat sinks are used to prevent the heat sink becoming electrically live. The LED 212 is encapsulated with a non conducting epoxy or silicone encapsulant 210, held in a cup or receptacle 209 to allow good light extraction. Lenses are often used in addition, although this is not depicted here, as this is not pertinent to the present invention. The use of a ceramic tile provides for a smooth surface for attaching the LED. With LED solder joints being as thin as 3 μm (gold tin solders) the surface morphology of the ceramic tile should be similar
By cutting into the metal core of the IMS PCB and soldering a ceramic tile in direct contact with the core of the board the thermal resistance can be reduced. The best LEDs packaged using Aluminum Nitride ceramic tiles soldered into the core of the IMS PCB offer thermal resistance of 4 K/W from the junction to the base of the modules.
An LED packaged in this way is shown in FIG. 3. The metal substrate 301 has the adhesive layer 302 attaching a polyamide electrical insulation layer 303. On top of this is the metal circuit tracking layer 304. This assembly, 301, 302, 303 and 304, is the IMS-PCB 316. The electrical tracking of the IMS-PCB 316 and the electrical circuit layer 306 of the ceramic tile 317 are electrically connected to together through the use of wire bonds 305. The ceramic tile, 317, can be any number of ceramics such as alumina or aluminium nitride although aluminium nitride is preferred due to its high thermal conductivity. The top electrical connection from the LED (309) to the electrical circuit layer 306 on the top of the ceramic tile (317) is via a wire bond 307. The bottom electrical contact of the LED 309 is in electrical contact with the top electrical contact 312 of the ceramic tile through the use of a solder joint 308.
Again, the use of the thermally conductive ceramic tile 317 ensures that there is a low resistance thermal path to the metal substrate 301. Thus the top electrical contact to the LED and the bottom electrical contact to the LED are separated through the used of the IMS PCB 316 and any heat sink attached to the bottom side of the IMS PCB 316 is electrically isolated through the use of the ceramic tile 317. This is an important issue if typical metal, graphite or conductive plastic heat sinks are used to prevent the heat sink becoming electrically live. The LED (309) is encapsulated with a suitable encapsulant such non conducting epoxy or silicone encapsulant 310, held in a cup or receptacle 311 to allow good light extraction. Lenses are often used in addition, although this is not depicted here as this is not the focus of this invention.
Additionally, it has recently been proposed that the LED chip can be segmented into electrically isolated LED cells, which can be wired up through wafer level electrical tracking to allow the chip to be driven directly off mains AC current (either 240 V or 120 V). It is well known in the prior art, for example U.S. Pat. No. 7,210,819 B2, that connecting up arrays of lateral LED chips in series using wire bonds or electrical tracking can allow direct AC operation at either 240 or 110 AC without the need for a DC driver chip. However, due to the high packing density of the LED cells the thermal dissipation adversely affects the efficient driving of such an AC LED device.
As will be appreciated, despite the various advancements in the field, there is still a need for an improved light emitting device with good electrical and thermal performance, together with a simplified packaging process.